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<title>DM-CtrlH7-BF-DevProgram: C:/Users/ASUS/Desktop/dm-ctrlH7-balance-9025test/Drivers/CMSIS/Include/core_cm0.h Source File</title>
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   <div id="projectname">DM-CtrlH7-BF-DevProgram<span id="projectnumber">&#160;beta 0.1</span>
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<div class="header">
  <div class="headertitle"><div class="title">core_cm0.h</div></div>
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<a href="core__cm0_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span><span class="comment">/**************************************************************************/</span></div>
<div class="line"><a id="l00007" name="l00007"></a><span class="lineno">    7</span><span class="comment">/*</span></div>
<div class="line"><a id="l00008" name="l00008"></a><span class="lineno">    8</span><span class="comment"> * Copyright (c) 2009-2019 Arm Limited. All rights reserved.</span></div>
<div class="line"><a id="l00009" name="l00009"></a><span class="lineno">    9</span><span class="comment"> *</span></div>
<div class="line"><a id="l00010" name="l00010"></a><span class="lineno">   10</span><span class="comment"> * SPDX-License-Identifier: Apache-2.0</span></div>
<div class="line"><a id="l00011" name="l00011"></a><span class="lineno">   11</span><span class="comment"> *</span></div>
<div class="line"><a id="l00012" name="l00012"></a><span class="lineno">   12</span><span class="comment"> * Licensed under the Apache License, Version 2.0 (the License); you may</span></div>
<div class="line"><a id="l00013" name="l00013"></a><span class="lineno">   13</span><span class="comment"> * not use this file except in compliance with the License.</span></div>
<div class="line"><a id="l00014" name="l00014"></a><span class="lineno">   14</span><span class="comment"> * You may obtain a copy of the License at</span></div>
<div class="line"><a id="l00015" name="l00015"></a><span class="lineno">   15</span><span class="comment"> *</span></div>
<div class="line"><a id="l00016" name="l00016"></a><span class="lineno">   16</span><span class="comment"> * www.apache.org/licenses/LICENSE-2.0</span></div>
<div class="line"><a id="l00017" name="l00017"></a><span class="lineno">   17</span><span class="comment"> *</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span><span class="comment"> * Unless required by applicable law or agreed to in writing, software</span></div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment"> * distributed under the License is distributed on an AS IS BASIS, WITHOUT</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="comment"> * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="comment"> * See the License for the specific language governing permissions and</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span><span class="comment"> * limitations under the License.</span></div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="comment"> */</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span> </div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#if   defined ( __ICCARM__ )</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span><span class="preprocessor">  #pragma system_include         </span><span class="comment">/* treat file as system include file for MISRA check */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="preprocessor">#elif defined (__clang__)</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="preprocessor">  #pragma clang system_header   </span><span class="comment">/* treat file as system include file */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00030" name="l00030"></a><span class="lineno">   30</span> </div>
<div class="line"><a id="l00031" name="l00031"></a><span class="lineno">   31</span><span class="preprocessor">#ifndef __CORE_CM0_H_GENERIC</span></div>
<div class="line"><a id="l00032" name="l00032"></a><span class="lineno">   32</span><span class="preprocessor">#define __CORE_CM0_H_GENERIC</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span> </div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span><span class="preprocessor">#include &lt;stdint.h&gt;</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span> </div>
<div class="line"><a id="l00036" name="l00036"></a><span class="lineno">   36</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00037" name="l00037"></a><span class="lineno">   37</span> <span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00038" name="l00038"></a><span class="lineno">   38</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span> </div>
<div class="line"><a id="l00054" name="l00054"></a><span class="lineno">   54</span> </div>
<div class="line"><a id="l00055" name="l00055"></a><span class="lineno">   55</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l00056" name="l00056"></a><span class="lineno">   56</span><span class="comment"> *                 CMSIS definitions</span></div>
<div class="line"><a id="l00057" name="l00057"></a><span class="lineno">   57</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span> </div>
<div class="line"><a id="l00063" name="l00063"></a><span class="lineno">   63</span><span class="preprocessor">#include &quot;<a class="code" href="cmsis__version_8h.html">cmsis_version.h</a>&quot;</span></div>
<div class="line"><a id="l00064" name="l00064"></a><span class="lineno">   64</span> </div>
<div class="line"><a id="l00065" name="l00065"></a><span class="lineno">   65</span><span class="comment">/*  CMSIS CM0 definitions */</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#acd01bf0a654a7f15f606593aa636bc72">   66</a></span><span class="preprocessor">#define __CM0_CMSIS_VERSION_MAIN  (__CM_CMSIS_VERSION_MAIN)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00067" name="l00067"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#ab6a85b0d3b2fbcfb62003006ece175cc">   67</a></span><span class="preprocessor">#define __CM0_CMSIS_VERSION_SUB   (__CM_CMSIS_VERSION_SUB)               </span><span class="preprocessor"></span></div>
<div class="foldopen" id="foldopen00068" data-start="" data-end="">
<div class="line"><a id="l00068" name="l00068"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#af233a7b7b2818cc6194e7a9386faccd8">   68</a></span><span class="preprocessor">#define __CM0_CMSIS_VERSION       ((__CM0_CMSIS_VERSION_MAIN &lt;&lt; 16U) | \</span></div>
<div class="line"><a id="l00069" name="l00069"></a><span class="lineno">   69</span><span class="preprocessor">                                    __CM0_CMSIS_VERSION_SUB           )  </span><span class="preprocessor"></span></div>
</div>
<div class="line"><a id="l00070" name="l00070"></a><span class="lineno">   70</span> </div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#a63ea62503c88acab19fcf3d5743009e3">   71</a></span><span class="preprocessor">#define __CORTEX_M                (0U)                                   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#aa167d0f532a7c2b2e3a6395db2fa0776">   76</a></span><span class="preprocessor">#define __FPU_USED       0U</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span> </div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span><span class="preprocessor">#if defined ( __CC_ARM )</span></div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span><span class="preprocessor">  #if defined __TARGET_FPU_VFP</span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span> </div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="preprocessor">#elif defined (__ARMCC_VERSION) &amp;&amp; (__ARMCC_VERSION &gt;= 6010050)</span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="preprocessor">  #if defined __ARM_FP</span></div>
<div class="line"><a id="l00085" name="l00085"></a><span class="lineno">   85</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00086" name="l00086"></a><span class="lineno">   86</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00087" name="l00087"></a><span class="lineno">   87</span> </div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span><span class="preprocessor">#elif defined ( __GNUC__ )</span></div>
<div class="line"><a id="l00089" name="l00089"></a><span class="lineno">   89</span><span class="preprocessor">  #if defined (__VFP_FP__) &amp;&amp; !defined(__SOFTFP__)</span></div>
<div class="line"><a id="l00090" name="l00090"></a><span class="lineno">   90</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00091" name="l00091"></a><span class="lineno">   91</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00092" name="l00092"></a><span class="lineno">   92</span> </div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="preprocessor">#elif defined ( __ICCARM__ )</span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span><span class="preprocessor">  #if defined __ARMVFP__</span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span> </div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">#elif defined ( __TI_ARM__ )</span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span><span class="preprocessor">  #if defined __TI_VFP_SUPPORT__</span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span> </div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span><span class="preprocessor">#elif defined ( __TASKING__ )</span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span><span class="preprocessor">  #if defined __FPU_VFP__</span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span> </div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span><span class="preprocessor">#elif defined ( __CSMC__ )</span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span><span class="preprocessor">  #if ( __CSMC__ &amp; 0x400U)</span></div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">    #error &quot;Compiler generates FPU instructions for a device without an FPU (check __FPU_PRESENT)&quot;</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span> </div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span> </div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span><span class="preprocessor">#include &quot;<a class="code" href="cmsis__compiler_8h.html">cmsis_compiler.h</a>&quot;</span>               <span class="comment">/* CMSIS compiler specific defines */</span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span> </div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span> </div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span>}</div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span> </div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="preprocessor">#endif </span><span class="comment">/* __CORE_CM0_H_GENERIC */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span> </div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span><span class="preprocessor">#ifndef __CMSIS_GENERIC</span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span> </div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span><span class="preprocessor">#ifndef __CORE_CM0_H_DEPENDANT</span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">#define __CORE_CM0_H_DEPENDANT</span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span> </div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span> <span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span> </div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span><span class="comment">/* check device defines and use defaults */</span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span><span class="preprocessor">#if defined __CHECK_DEVICE_DEFINES</span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span><span class="preprocessor">  #ifndef __CM0_REV</span></div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">    #define __CM0_REV               0x0000U</span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span><span class="preprocessor">    #warning &quot;__CM0_REV not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span> </div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span><span class="preprocessor">  #ifndef __NVIC_PRIO_BITS</span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span><span class="preprocessor">    #define __NVIC_PRIO_BITS          2U</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">    #warning &quot;__NVIC_PRIO_BITS not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span> </div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="preprocessor">  #ifndef __Vendor_SysTickConfig</span></div>
<div class="line"><a id="l00146" name="l00146"></a><span class="lineno">  146</span><span class="preprocessor">    #define __Vendor_SysTickConfig    0U</span></div>
<div class="line"><a id="l00147" name="l00147"></a><span class="lineno">  147</span><span class="preprocessor">    #warning &quot;__Vendor_SysTickConfig not defined in device header file; using default!&quot;</span></div>
<div class="line"><a id="l00148" name="l00148"></a><span class="lineno">  148</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00150" name="l00150"></a><span class="lineno">  150</span> </div>
<div class="line"><a id="l00151" name="l00151"></a><span class="lineno">  151</span><span class="comment">/* IO definitions (access restrictions to peripheral registers) */</span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span><span class="preprocessor">  #define   __I     volatile             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#af63697ed9952cc71e1225efe205f6cd3">  162</a></span><span class="preprocessor">  #define   __I     volatile const       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#a7e25d9380f9ef903923964322e71f2f6">  164</a></span><span class="preprocessor">#define     __O     volatile             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno"><a class="line" href="core__cm0_8h.html#aec43007d9998a0a0e01faede4133d6be">  165</a></span><span class="preprocessor">#define     __IO    volatile             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span> </div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="comment">/* following defines should be used for structure members */</span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span><span class="preprocessor">#define     __IM     volatile const      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="preprocessor">#define     __OM     volatile            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="preprocessor">#define     __IOM    volatile            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span> </div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span> </div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span> </div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span><span class="comment"> *                 Register Abstraction</span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span><span class="comment">  Core Register contain:</span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span><span class="comment">  - Core Register</span></div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span><span class="comment">  - Core NVIC Register</span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="comment">  - Core SCB Register</span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="comment">  - Core SysTick Register</span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span>{</div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span>  {</div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#gab762ed7623c36d850c7297cd1f24509e">  203</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#gab762ed7623c36d850c7297cd1f24509e">_reserved0</a>:28;              </div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga9023adc91d8aea01f9406531c3a35eee">  204</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga9023adc91d8aea01f9406531c3a35eee">V</a>:1;                        </div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga36e89dda90c6e6ca7384ca46a3fdad06">  205</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga36e89dda90c6e6ca7384ca46a3fdad06">C</a>:1;                        </div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#gad25374f026cfcb1b52773d882a602c6a">  206</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#gad25374f026cfcb1b52773d882a602c6a">Z</a>:1;                        </div>
<div class="line"><a id="l00207" name="l00207"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga94be0573c6a833f1f58a75152d567a7a">  207</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga94be0573c6a833f1f58a75152d567a7a">N</a>:1;                        </div>
<div class="line"><a id="l00208" name="l00208"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga9c23fd2d97658b991942806044a563de">  208</a></span>  } b;                                   </div>
<div class="line"><a id="l00209" name="l00209"></a><span class="lineno">  209</span>  uint32_t w;                            </div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span>} <a class="code hl_union" href="union_a_p_s_r___type.html">APSR_Type</a>;</div>
<div class="line"><a id="l00211" name="l00211"></a><span class="lineno">  211</span> </div>
<div class="line"><a id="l00212" name="l00212"></a><span class="lineno">  212</span><span class="comment">/* APSR Register Definitions */</span></div>
<div class="line"><a id="l00213" name="l00213"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac469528d210043c7bd3f12f0e6824766">  213</a></span><span class="preprocessor">#define APSR_N_Pos                         31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbc2cf55a026f661b53fadfcf822cef1">  214</a></span><span class="preprocessor">#define APSR_N_Msk                         (1UL &lt;&lt; APSR_N_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span> </div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3661286d108b1aca308d7445685eae3a">  216</a></span><span class="preprocessor">#define APSR_Z_Pos                         30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00217" name="l00217"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1deb4d1aa72bb83d1f79329406f15711">  217</a></span><span class="preprocessor">#define APSR_Z_Msk                         (1UL &lt;&lt; APSR_Z_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00218" name="l00218"></a><span class="lineno">  218</span> </div>
<div class="line"><a id="l00219" name="l00219"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6cf72aa6f09a168f9e5beda1a4a887b9">  219</a></span><span class="preprocessor">#define APSR_C_Pos                         29U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6d47803fbad455bc10bd1ce59f2f335d">  220</a></span><span class="preprocessor">#define APSR_C_Msk                         (1UL &lt;&lt; APSR_C_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00221" name="l00221"></a><span class="lineno">  221</span> </div>
<div class="line"><a id="l00222" name="l00222"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac62830f67679ccd11658c4172c3e6ea7">  222</a></span><span class="preprocessor">#define APSR_V_Pos                         28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00223" name="l00223"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga33305d6701356bff6890b315fe8b5489">  223</a></span><span class="preprocessor">#define APSR_V_Msk                         (1UL &lt;&lt; APSR_V_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span> </div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span></div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00230" name="l00230"></a><span class="lineno">  230</span>{</div>
<div class="line"><a id="l00231" name="l00231"></a><span class="lineno">  231</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00232" name="l00232"></a><span class="lineno">  232</span>  {</div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga28fbc14f3a92ec74abc7e1a82a5c4df6">  233</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga28fbc14f3a92ec74abc7e1a82a5c4df6">ISR</a>:9;                      </div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga74221d6ee1a06c0833c8149f3e547e7f">  234</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga74221d6ee1a06c0833c8149f3e547e7f">_reserved0</a>:23;              </div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga0ef1d8fa76fb06f35cd2407b1b554e4c">  235</a></span>  } b;                                   </div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span>  uint32_t w;                            </div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span>} <a class="code hl_union" href="union_i_p_s_r___type.html">IPSR_Type</a>;</div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span> </div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span><span class="comment">/* IPSR Register Definitions */</span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0e34027584d02c43811ae908a5ca9adf">  240</a></span><span class="preprocessor">#define IPSR_ISR_Pos                        0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00241" name="l00241"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf013a4579a64d1f21f56ea9f1b33ab56">  241</a></span><span class="preprocessor">#define IPSR_ISR_Msk                       (0x1FFUL </span><span class="comment">/*&lt;&lt; IPSR_ISR_Pos*/</span><span class="preprocessor">)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00242" name="l00242"></a><span class="lineno">  242</span> </div>
<div class="line"><a id="l00243" name="l00243"></a><span class="lineno">  243</span></div>
<div class="line"><a id="l00247" name="l00247"></a><span class="lineno">  247</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span>{</div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span>  {</div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#gacbf57624aef414dc7da14474b1241a02">  251</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#gacbf57624aef414dc7da14474b1241a02">ISR</a>:9;                      </div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga849e0c8d3dba58d2792efc8571a7fdb2">  252</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga849e0c8d3dba58d2792efc8571a7fdb2">_reserved0</a>:15;              </div>
<div class="line"><a id="l00253" name="l00253"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#gac995307041a17f8629632bbb4a069d34">  253</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#gac995307041a17f8629632bbb4a069d34">T</a>:1;                        </div>
<div class="line"><a id="l00254" name="l00254"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga65932dbb8335d87fc2ff97cdb4cd7f3a">  254</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga65932dbb8335d87fc2ff97cdb4cd7f3a">_reserved1</a>:3;               </div>
<div class="line"><a id="l00255" name="l00255"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga86230d29a182c63725c8c5daa41c4ba3">  255</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga86230d29a182c63725c8c5daa41c4ba3">V</a>:1;                        </div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga8693dca5a7d6ccd0a561eea73edd6ac4">  256</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga8693dca5a7d6ccd0a561eea73edd6ac4">C</a>:1;                        </div>
<div class="line"><a id="l00257" name="l00257"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga1ae7fa3814762400bb6a934c239dacaf">  257</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga1ae7fa3814762400bb6a934c239dacaf">Z</a>:1;                        </div>
<div class="line"><a id="l00258" name="l00258"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga481f068e2561584e7f6cf9a9b63fbaa6">  258</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga481f068e2561584e7f6cf9a9b63fbaa6">N</a>:1;                        </div>
<div class="line"><a id="l00259" name="l00259"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga65f28aa156c10cb2783d4a2452705610">  259</a></span>  } b;                                   </div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span>  uint32_t w;                            </div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span>} <a class="code hl_union" href="unionx_p_s_r___type.html">xPSR_Type</a>;</div>
<div class="line"><a id="l00262" name="l00262"></a><span class="lineno">  262</span> </div>
<div class="line"><a id="l00263" name="l00263"></a><span class="lineno">  263</span><span class="comment">/* xPSR Register Definitions */</span></div>
<div class="line"><a id="l00264" name="l00264"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga031eb1b8ebcdb3d602d0b9f2ec82a7ae">  264</a></span><span class="preprocessor">#define xPSR_N_Pos                         31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf600f4ff41b62cf2f3b0a59b6d2e93d6">  265</a></span><span class="preprocessor">#define xPSR_N_Msk                         (1UL &lt;&lt; xPSR_N_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00266" name="l00266"></a><span class="lineno">  266</span> </div>
<div class="line"><a id="l00267" name="l00267"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5869dd608eea73c80f0567d781d2230b">  267</a></span><span class="preprocessor">#define xPSR_Z_Pos                         30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00268" name="l00268"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga907599209fba99f579778e662021c4f2">  268</a></span><span class="preprocessor">#define xPSR_Z_Msk                         (1UL &lt;&lt; xPSR_Z_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span> </div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga14adb79b91f6634b351a1b57394e2db6">  270</a></span><span class="preprocessor">#define xPSR_C_Pos                         29U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga21e2497255d380f956ca0f48d11d0775">  271</a></span><span class="preprocessor">#define xPSR_C_Msk                         (1UL &lt;&lt; xPSR_C_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span> </div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae0cfbb394490db402623d97e6a979e00">  273</a></span><span class="preprocessor">#define xPSR_V_Pos                         28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab07f94ed3b6ee695f5af719dc27995c2">  274</a></span><span class="preprocessor">#define xPSR_V_Msk                         (1UL &lt;&lt; xPSR_V_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span> </div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98d801da9a49cda944f52aeae104dd38">  276</a></span><span class="preprocessor">#define xPSR_T_Pos                         24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga30ae2111816e82d47636a8d4577eb6ee">  277</a></span><span class="preprocessor">#define xPSR_T_Msk                         (1UL &lt;&lt; xPSR_T_Pos)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span> </div>
<div class="line"><a id="l00279" name="l00279"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga21bff245fb1aef9683f693d9d7bb2233">  279</a></span><span class="preprocessor">#define xPSR_ISR_Pos                        0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00280" name="l00280"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadf8eed87e0081dfe1ef1c78a0ea91afd">  280</a></span><span class="preprocessor">#define xPSR_ISR_Msk                       (0x1FFUL </span><span class="comment">/*&lt;&lt; xPSR_ISR_Pos*/</span><span class="preprocessor">)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00281" name="l00281"></a><span class="lineno">  281</span> </div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span><span class="keyword">typedef</span> <span class="keyword">union</span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span>{</div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span>  <span class="keyword">struct</span></div>
<div class="line"><a id="l00289" name="l00289"></a><span class="lineno">  289</span>  {</div>
<div class="line"><a id="l00290" name="l00290"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#gaf8c314273a1e4970a5671bd7f8184f50">  290</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#gaf8c314273a1e4970a5671bd7f8184f50">_reserved0</a>:1;               </div>
<div class="line"><a id="l00291" name="l00291"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga52259f5a3b281bdcf3d55fc30465cce3">  291</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga52259f5a3b281bdcf3d55fc30465cce3">SPSEL</a>:1;                    </div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#gae8e2e27dac05ce9bb09f5e4c2aca4f8a">  292</a></span>    uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#gae8e2e27dac05ce9bb09f5e4c2aca4f8a">_reserved1</a>:30;              </div>
<div class="line"><a id="l00293" name="l00293"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga2d735e6c2d67e71d1c987e14f080bb20">  293</a></span>  } b;                                   </div>
<div class="line"><a id="l00294" name="l00294"></a><span class="lineno">  294</span>  uint32_t w;                            </div>
<div class="line"><a id="l00295" name="l00295"></a><span class="lineno">  295</span>} <a class="code hl_union" href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a>;</div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span> </div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span><span class="comment">/* CONTROL Register Definitions */</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga07eafc53e609895342c6a530e9d01310">  298</a></span><span class="preprocessor">#define CONTROL_SPSEL_Pos                   1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga70b29840969b06909da21369b0b05b53">  299</a></span><span class="preprocessor">#define CONTROL_SPSEL_Msk                  (1UL &lt;&lt; CONTROL_SPSEL_Pos)                     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span> </div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span></div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span></div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00315" name="l00315"></a><span class="lineno">  315</span>{</div>
<div class="line"><a id="l00316" name="l00316"></a><span class="lineno">  316</span>  __IOM uint32_t ISER[1U];               </div>
<div class="line"><a id="l00317" name="l00317"></a><span class="lineno">  317</span>        uint32_t RESERVED0[31U];</div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span>  __IOM uint32_t ICER[1U];               </div>
<div class="line"><a id="l00319" name="l00319"></a><span class="lineno">  319</span>        uint32_t RESERVED1[31U];</div>
<div class="line"><a id="l00320" name="l00320"></a><span class="lineno">  320</span>  __IOM uint32_t ISPR[1U];               </div>
<div class="line"><a id="l00321" name="l00321"></a><span class="lineno">  321</span>        uint32_t RESERVED2[31U];</div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span>  __IOM uint32_t ICPR[1U];               </div>
<div class="line"><a id="l00323" name="l00323"></a><span class="lineno">  323</span>        uint32_t RESERVED3[31U];</div>
<div class="line"><a id="l00324" name="l00324"></a><span class="lineno">  324</span>        uint32_t RESERVED4[64U];</div>
<div class="line"><a id="l00325" name="l00325"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga4eef47929a0d1317a107f1ac62e28464">  325</a></span>  __IOM uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga4eef47929a0d1317a107f1ac62e28464">IP</a>[8U];                 </div>
<div class="line"><a id="l00326" name="l00326"></a><span class="lineno">  326</span>}  <a class="code hl_struct" href="struct_n_v_i_c___type.html">NVIC_Type</a>;</div>
<div class="line"><a id="l00327" name="l00327"></a><span class="lineno">  327</span></div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span> </div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span></div>
<div class="line"><a id="l00337" name="l00337"></a><span class="lineno">  337</span></div>
<div class="line"><a id="l00341" name="l00341"></a><span class="lineno">  341</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00342" name="l00342"></a><span class="lineno">  342</span>{</div>
<div class="line"><a id="l00343" name="l00343"></a><span class="lineno">  343</span>  __IM  uint32_t CPUID;                  </div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span>  __IOM uint32_t ICSR;                   </div>
<div class="line"><a id="l00345" name="l00345"></a><span class="lineno">  345</span>        uint32_t RESERVED0;</div>
<div class="line"><a id="l00346" name="l00346"></a><span class="lineno">  346</span>  __IOM uint32_t AIRCR;                  </div>
<div class="line"><a id="l00347" name="l00347"></a><span class="lineno">  347</span>  __IOM uint32_t SCR;                    </div>
<div class="line"><a id="l00348" name="l00348"></a><span class="lineno">  348</span>  __IOM uint32_t CCR;                    </div>
<div class="line"><a id="l00349" name="l00349"></a><span class="lineno">  349</span>        uint32_t RESERVED1;</div>
<div class="line"><a id="l00350" name="l00350"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga5c40d124f95a3f7f431a3d5409d6ad28">  350</a></span>  __IOM uint32_t <a class="code hl_variable" href="group___c_m_s_i_s___core___sys_tick_functions.html#ga5c40d124f95a3f7f431a3d5409d6ad28">SHP</a>[2U];                </div>
<div class="line"><a id="l00351" name="l00351"></a><span class="lineno">  351</span>  __IOM uint32_t <a class="code hl_variable" href="group___c_m_s_i_s__core___debug_functions.html#ga7b5ae9741a99808043394c4743b635c4">SHCSR</a>;                  </div>
<div class="line"><a id="l00352" name="l00352"></a><span class="lineno">  352</span>} <a class="code hl_struct" href="struct_s_c_b___type.html">SCB_Type</a>;</div>
<div class="line"><a id="l00353" name="l00353"></a><span class="lineno">  353</span> </div>
<div class="line"><a id="l00354" name="l00354"></a><span class="lineno">  354</span><span class="comment">/* SCB CPUID Register Definitions */</span></div>
<div class="line"><a id="l00355" name="l00355"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga58686b88f94f789d4e6f429fe1ff58cf">  355</a></span><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Pos          24U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00356" name="l00356"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0932b31faafd47656a03ced75a31d99b">  356</a></span><span class="preprocessor">#define SCB_CPUID_IMPLEMENTER_Msk          (0xFFUL &lt;&lt; SCB_CPUID_IMPLEMENTER_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00357" name="l00357"></a><span class="lineno">  357</span> </div>
<div class="line"><a id="l00358" name="l00358"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga104462bd0815391b4044a70bd15d3a71">  358</a></span><span class="preprocessor">#define SCB_CPUID_VARIANT_Pos              20U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00359" name="l00359"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad358dfbd04300afc1824329d128b99e8">  359</a></span><span class="preprocessor">#define SCB_CPUID_VARIANT_Msk              (0xFUL &lt;&lt; SCB_CPUID_VARIANT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00360" name="l00360"></a><span class="lineno">  360</span> </div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf8b3236b08fb8e840efb682645fb0e98">  361</a></span><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafae4a1f27a927338ae9dc51a0e146213">  362</a></span><span class="preprocessor">#define SCB_CPUID_ARCHITECTURE_Msk         (0xFUL &lt;&lt; SCB_CPUID_ARCHITECTURE_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno">  363</span> </div>
<div class="line"><a id="l00364" name="l00364"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga705f68eaa9afb042ca2407dc4e4629ac">  364</a></span><span class="preprocessor">#define SCB_CPUID_PARTNO_Pos                4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00365" name="l00365"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga98e581423ca016680c238c469aba546d">  365</a></span><span class="preprocessor">#define SCB_CPUID_PARTNO_Msk               (0xFFFUL &lt;&lt; SCB_CPUID_PARTNO_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00366" name="l00366"></a><span class="lineno">  366</span> </div>
<div class="line"><a id="l00367" name="l00367"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3c3d9071e574de11fb27ba57034838b1">  367</a></span><span class="preprocessor">#define SCB_CPUID_REVISION_Pos              0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00368" name="l00368"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2ec0448b6483f77e7f5d08b4b81d85df">  368</a></span><span class="preprocessor">#define SCB_CPUID_REVISION_Msk             (0xFUL </span><span class="comment">/*&lt;&lt; SCB_CPUID_REVISION_Pos*/</span><span class="preprocessor">)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00369" name="l00369"></a><span class="lineno">  369</span> </div>
<div class="line"><a id="l00370" name="l00370"></a><span class="lineno">  370</span><span class="comment">/* SCB Interrupt Control State Register Definitions */</span></div>
<div class="line"><a id="l00371" name="l00371"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga750d4b52624a46d71356db4ea769573b">  371</a></span><span class="preprocessor">#define SCB_ICSR_NMIPENDSET_Pos            31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00372" name="l00372"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga340e3f79e9c3607dee9f2c048b6b22e8">  372</a></span><span class="preprocessor">#define SCB_ICSR_NMIPENDSET_Msk            (1UL &lt;&lt; SCB_ICSR_NMIPENDSET_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00373" name="l00373"></a><span class="lineno">  373</span> </div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab5ded23d2ab1d5ff7cc7ce746205e9fe">  374</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVSET_Pos             28U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1e40d93efb402763c8c00ddcc56724ff">  375</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVSET_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSVSET_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno">  376</span> </div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae218d9022288f89faf57187c4d542ecd">  377</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVCLR_Pos             27U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00378" name="l00378"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga4a901ace381d3c1c74ac82b22fae2e1e">  378</a></span><span class="preprocessor">#define SCB_ICSR_PENDSVCLR_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSVCLR_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00379" name="l00379"></a><span class="lineno">  379</span> </div>
<div class="line"><a id="l00380" name="l00380"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga9dbb3358c6167c9c3f85661b90fb2794">  380</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTSET_Pos             26U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00381" name="l00381"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga7325b61ea0ec323ef2d5c893b112e546">  381</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTSET_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSTSET_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00382" name="l00382"></a><span class="lineno">  382</span> </div>
<div class="line"><a id="l00383" name="l00383"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbe25e4b333ece1341beb1a740168fdc">  383</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTCLR_Pos             25U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab241827d2a793269d8cd99b9b28c2157">  384</a></span><span class="preprocessor">#define SCB_ICSR_PENDSTCLR_Msk             (1UL &lt;&lt; SCB_ICSR_PENDSTCLR_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00385" name="l00385"></a><span class="lineno">  385</span> </div>
<div class="line"><a id="l00386" name="l00386"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga11cb5b1f9ce167b81f31787a77e575df">  386</a></span><span class="preprocessor">#define SCB_ICSR_ISRPREEMPT_Pos            23U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00387" name="l00387"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa966600396290808d596fe96e92ca2b5">  387</a></span><span class="preprocessor">#define SCB_ICSR_ISRPREEMPT_Msk            (1UL &lt;&lt; SCB_ICSR_ISRPREEMPT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00388" name="l00388"></a><span class="lineno">  388</span> </div>
<div class="line"><a id="l00389" name="l00389"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga10749d92b9b744094b845c2eb46d4319">  389</a></span><span class="preprocessor">#define SCB_ICSR_ISRPENDING_Pos            22U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00390" name="l00390"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga056d74fd538e5d36d3be1f28d399c877">  390</a></span><span class="preprocessor">#define SCB_ICSR_ISRPENDING_Msk            (1UL &lt;&lt; SCB_ICSR_ISRPENDING_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00391" name="l00391"></a><span class="lineno">  391</span> </div>
<div class="line"><a id="l00392" name="l00392"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gada60c92bf88d6fd21a8f49efa4a127b8">  392</a></span><span class="preprocessor">#define SCB_ICSR_VECTPENDING_Pos           12U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacb6992e7c7ddc27a370f62878a21ef72">  393</a></span><span class="preprocessor">#define SCB_ICSR_VECTPENDING_Msk           (0x1FFUL &lt;&lt; SCB_ICSR_VECTPENDING_Pos)          </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span> </div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gae4f602c7c5c895d5fb687b71b0979fc3">  395</a></span><span class="preprocessor">#define SCB_ICSR_VECTACTIVE_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00396" name="l00396"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga5533791a4ecf1b9301c883047b3e8396">  396</a></span><span class="preprocessor">#define SCB_ICSR_VECTACTIVE_Msk            (0x1FFUL </span><span class="comment">/*&lt;&lt; SCB_ICSR_VECTACTIVE_Pos*/</span><span class="preprocessor">)       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00397" name="l00397"></a><span class="lineno">  397</span> </div>
<div class="line"><a id="l00398" name="l00398"></a><span class="lineno">  398</span><span class="comment">/* SCB Application Interrupt and Reset Control Register Definitions */</span></div>
<div class="line"><a id="l00399" name="l00399"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">  399</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEY_Pos              16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00400" name="l00400"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga90c7cf0c490e7ae55f9503a7fda1dd22">  400</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEY_Msk              (0xFFFFUL &lt;&lt; SCB_AIRCR_VECTKEY_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00401" name="l00401"></a><span class="lineno">  401</span> </div>
<div class="line"><a id="l00402" name="l00402"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaec404750ff5ca07f499a3c06b62051ef">  402</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEYSTAT_Pos          16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gabacedaefeefc73d666bbe59ece904493">  403</a></span><span class="preprocessor">#define SCB_AIRCR_VECTKEYSTAT_Msk          (0xFFFFUL &lt;&lt; SCB_AIRCR_VECTKEYSTAT_Pos)        </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span> </div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad31dec98fbc0d33ace63cb1f1a927923">  405</a></span><span class="preprocessor">#define SCB_AIRCR_ENDIANESS_Pos            15U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f571f93d3d4a6eac9a3040756d3d951">  406</a></span><span class="preprocessor">#define SCB_AIRCR_ENDIANESS_Msk            (1UL &lt;&lt; SCB_AIRCR_ENDIANESS_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span> </div>
<div class="line"><a id="l00408" name="l00408"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaffb2737eca1eac0fc1c282a76a40953c">  408</a></span><span class="preprocessor">#define SCB_AIRCR_SYSRESETREQ_Pos           2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00409" name="l00409"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaae1181119559a5bd36e62afa373fa720">  409</a></span><span class="preprocessor">#define SCB_AIRCR_SYSRESETREQ_Msk          (1UL &lt;&lt; SCB_AIRCR_SYSRESETREQ_Pos)             </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00410" name="l00410"></a><span class="lineno">  410</span> </div>
<div class="line"><a id="l00411" name="l00411"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa30a12e892bb696e61626d71359a9029">  411</a></span><span class="preprocessor">#define SCB_AIRCR_VECTCLRACTIVE_Pos         1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00412" name="l00412"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga212c5ab1c1c82c807d30d2307aa8d218">  412</a></span><span class="preprocessor">#define SCB_AIRCR_VECTCLRACTIVE_Msk        (1UL &lt;&lt; SCB_AIRCR_VECTCLRACTIVE_Pos)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00413" name="l00413"></a><span class="lineno">  413</span> </div>
<div class="line"><a id="l00414" name="l00414"></a><span class="lineno">  414</span><span class="comment">/* SCB System Control Register Definitions */</span></div>
<div class="line"><a id="l00415" name="l00415"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3bddcec40aeaf3d3a998446100fa0e44">  415</a></span><span class="preprocessor">#define SCB_SCR_SEVONPEND_Pos               4U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00416" name="l00416"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafb98656644a14342e467505f69a997c9">  416</a></span><span class="preprocessor">#define SCB_SCR_SEVONPEND_Msk              (1UL &lt;&lt; SCB_SCR_SEVONPEND_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00417" name="l00417"></a><span class="lineno">  417</span> </div>
<div class="line"><a id="l00418" name="l00418"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gab304f6258ec03bd9a6e7a360515c3cfe">  418</a></span><span class="preprocessor">#define SCB_SCR_SLEEPDEEP_Pos               2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00419" name="l00419"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga77c06a69c63f4b3f6ec1032e911e18e7">  419</a></span><span class="preprocessor">#define SCB_SCR_SLEEPDEEP_Msk              (1UL &lt;&lt; SCB_SCR_SLEEPDEEP_Pos)                 </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00420" name="l00420"></a><span class="lineno">  420</span> </div>
<div class="line"><a id="l00421" name="l00421"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3680a15114d7fdc1e25043b881308fe9">  421</a></span><span class="preprocessor">#define SCB_SCR_SLEEPONEXIT_Pos             1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga50a243e317b9a70781b02758d45b05ee">  422</a></span><span class="preprocessor">#define SCB_SCR_SLEEPONEXIT_Msk            (1UL &lt;&lt; SCB_SCR_SLEEPONEXIT_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span> </div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno">  424</span><span class="comment">/* SCB Configuration Control Register Definitions */</span></div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac2d20a250960a432cc74da59d20e2f86">  425</a></span><span class="preprocessor">#define SCB_CCR_STKALIGN_Pos                9U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga33cf22d3d46af158a03aad25ddea1bcb">  426</a></span><span class="preprocessor">#define SCB_CCR_STKALIGN_Msk               (1UL &lt;&lt; SCB_CCR_STKALIGN_Pos)                  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00427" name="l00427"></a><span class="lineno">  427</span> </div>
<div class="line"><a id="l00428" name="l00428"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac4e4928b864ea10fc24dbbc57d976229">  428</a></span><span class="preprocessor">#define SCB_CCR_UNALIGN_TRP_Pos             3U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00429" name="l00429"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga68c96ad594af70c007923979085c99e0">  429</a></span><span class="preprocessor">#define SCB_CCR_UNALIGN_TRP_Msk            (1UL &lt;&lt; SCB_CCR_UNALIGN_TRP_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00430" name="l00430"></a><span class="lineno">  430</span> </div>
<div class="line"><a id="l00431" name="l00431"></a><span class="lineno">  431</span><span class="comment">/* SCB System Handler Control and State Register Definitions */</span></div>
<div class="line"><a id="l00432" name="l00432"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga2f93ec9b243f94cdd3e94b8f0bf43641">  432</a></span><span class="preprocessor">#define SCB_SHCSR_SVCALLPENDED_Pos         15U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00433" name="l00433"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga6095a7acfbad66f52822b1392be88652">  433</a></span><span class="preprocessor">#define SCB_SHCSR_SVCALLPENDED_Msk         (1UL &lt;&lt; SCB_SHCSR_SVCALLPENDED_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00434" name="l00434"></a><span class="lineno">  434</span></div>
<div class="line"><a id="l00436" name="l00436"></a><span class="lineno">  436</span> </div>
<div class="line"><a id="l00437" name="l00437"></a><span class="lineno">  437</span></div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span></div>
<div class="line"><a id="l00448" name="l00448"></a><span class="lineno">  448</span><span class="keyword">typedef</span> <span class="keyword">struct</span></div>
<div class="line"><a id="l00449" name="l00449"></a><span class="lineno">  449</span>{</div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span>  __IOM uint32_t CTRL;                   </div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span>  __IOM uint32_t LOAD;                   </div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span>  __IOM uint32_t VAL;                    </div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span>  __IM  uint32_t CALIB;                  </div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span>} <a class="code hl_struct" href="struct_sys_tick___type.html">SysTick_Type</a>;</div>
<div class="line"><a id="l00455" name="l00455"></a><span class="lineno">  455</span> </div>
<div class="line"><a id="l00456" name="l00456"></a><span class="lineno">  456</span><span class="comment">/* SysTick Control / Status Register Definitions */</span></div>
<div class="line"><a id="l00457" name="l00457"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadbb65d4a815759649db41df216ed4d60">  457</a></span><span class="preprocessor">#define SysTick_CTRL_COUNTFLAG_Pos         16U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00458" name="l00458"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga1bf3033ecccf200f59baefe15dbb367c">  458</a></span><span class="preprocessor">#define SysTick_CTRL_COUNTFLAG_Msk         (1UL &lt;&lt; SysTick_CTRL_COUNTFLAG_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00459" name="l00459"></a><span class="lineno">  459</span> </div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga24fbc69a5f0b78d67fda2300257baff1">  460</a></span><span class="preprocessor">#define SysTick_CTRL_CLKSOURCE_Pos          2U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa41d06039797423a46596bd313d57373">  461</a></span><span class="preprocessor">#define SysTick_CTRL_CLKSOURCE_Msk         (1UL &lt;&lt; SysTick_CTRL_CLKSOURCE_Pos)            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span> </div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga88f45bbb89ce8df3cd2b2613c7b48214">  463</a></span><span class="preprocessor">#define SysTick_CTRL_TICKINT_Pos            1U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga95bb984266ca764024836a870238a027">  464</a></span><span class="preprocessor">#define SysTick_CTRL_TICKINT_Msk           (1UL &lt;&lt; SysTick_CTRL_TICKINT_Pos)              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00465" name="l00465"></a><span class="lineno">  465</span> </div>
<div class="line"><a id="l00466" name="l00466"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga0b48cc1e36d92a92e4bf632890314810">  466</a></span><span class="preprocessor">#define SysTick_CTRL_ENABLE_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00467" name="l00467"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga16c9fee0ed0235524bdeb38af328fd1f">  467</a></span><span class="preprocessor">#define SysTick_CTRL_ENABLE_Msk            (1UL </span><span class="comment">/*&lt;&lt; SysTick_CTRL_ENABLE_Pos*/</span><span class="preprocessor">)           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00468" name="l00468"></a><span class="lineno">  468</span> </div>
<div class="line"><a id="l00469" name="l00469"></a><span class="lineno">  469</span><span class="comment">/* SysTick Reload Register Definitions */</span></div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf44d10df359dc5bf5752b0894ae3bad2">  470</a></span><span class="preprocessor">#define SysTick_LOAD_RELOAD_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga265912a7962f0e1abd170336e579b1b1">  471</a></span><span class="preprocessor">#define SysTick_LOAD_RELOAD_Msk            (0xFFFFFFUL </span><span class="comment">/*&lt;&lt; SysTick_LOAD_RELOAD_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span> </div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span><span class="comment">/* SysTick Current Register Definitions */</span></div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3208104c3b019b5de35ae8c21d5c34dd">  474</a></span><span class="preprocessor">#define SysTick_VAL_CURRENT_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00475" name="l00475"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gafc77b56d568930b49a2474debc75ab45">  475</a></span><span class="preprocessor">#define SysTick_VAL_CURRENT_Msk            (0xFFFFFFUL </span><span class="comment">/*&lt;&lt; SysTick_VAL_CURRENT_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00476" name="l00476"></a><span class="lineno">  476</span> </div>
<div class="line"><a id="l00477" name="l00477"></a><span class="lineno">  477</span><span class="comment">/* SysTick Calibration Register Definitions */</span></div>
<div class="line"><a id="l00478" name="l00478"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga534dbe414e7a46a6ce4c1eca1fbff409">  478</a></span><span class="preprocessor">#define SysTick_CALIB_NOREF_Pos            31U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00479" name="l00479"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3af0d891fdd99bcc8d8912d37830edb6">  479</a></span><span class="preprocessor">#define SysTick_CALIB_NOREF_Msk            (1UL &lt;&lt; SysTick_CALIB_NOREF_Pos)               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00480" name="l00480"></a><span class="lineno">  480</span> </div>
<div class="line"><a id="l00481" name="l00481"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gadd0c9cd6641b9f6a0c618e7982954860">  481</a></span><span class="preprocessor">#define SysTick_CALIB_SKEW_Pos             30U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00482" name="l00482"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga8a6a85a87334776f33d77fd147587431">  482</a></span><span class="preprocessor">#define SysTick_CALIB_SKEW_Msk             (1UL &lt;&lt; SysTick_CALIB_SKEW_Pos)                </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00483" name="l00483"></a><span class="lineno">  483</span> </div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacae558f6e75a0bed5d826f606d8e695e">  484</a></span><span class="preprocessor">#define SysTick_CALIB_TENMS_Pos             0U                                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00485" name="l00485"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaf1e68865c5aece2ad58971225bd3e95e">  485</a></span><span class="preprocessor">#define SysTick_CALIB_TENMS_Msk            (0xFFFFFFUL </span><span class="comment">/*&lt;&lt; SysTick_CALIB_TENMS_Pos*/</span><span class="preprocessor">)    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00486" name="l00486"></a><span class="lineno">  486</span></div>
<div class="line"><a id="l00488" name="l00488"></a><span class="lineno">  488</span> </div>
<div class="line"><a id="l00489" name="l00489"></a><span class="lineno">  489</span></div>
<div class="line"><a id="l00498" name="l00498"></a><span class="lineno">  498</span> </div>
<div class="line"><a id="l00499" name="l00499"></a><span class="lineno">  499</span></div>
<div class="line"><a id="l00506" name="l00506"></a><span class="lineno">  506</span></div>
<div class="line"><a id="l00513" name="l00513"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga286e3b913dbd236c7f48ea70c8821f4e">  513</a></span><span class="preprocessor">#define _VAL2FLD(field, value)    (((uint32_t)(value) &lt;&lt; field ## _Pos) &amp; field ## _Msk)</span></div>
<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span></div>
<div class="line"><a id="l00521" name="l00521"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga139b6e261c981f014f386927ca4a8444">  521</a></span><span class="preprocessor">#define _FLD2VAL(field, value)    (((uint32_t)(value) &amp; field ## _Msk) &gt;&gt; field ## _Pos)</span></div>
<div class="line"><a id="l00522" name="l00522"></a><span class="lineno">  522</span></div>
<div class="line"><a id="l00524" name="l00524"></a><span class="lineno">  524</span> </div>
<div class="line"><a id="l00525" name="l00525"></a><span class="lineno">  525</span></div>
<div class="line"><a id="l00532" name="l00532"></a><span class="lineno">  532</span> </div>
<div class="line"><a id="l00533" name="l00533"></a><span class="lineno">  533</span><span class="comment">/* Memory mapping of Core Hardware */</span></div>
<div class="line"><a id="l00534" name="l00534"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga3c14ed93192c8d9143322bbf77ebf770">  534</a></span><span class="preprocessor">#define SCS_BASE            (0xE000E000UL)                            </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00535" name="l00535"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#ga58effaac0b93006b756d33209e814646">  535</a></span><span class="preprocessor">#define SysTick_BASE        (SCS_BASE +  0x0010UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00536" name="l00536"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaa0288691785a5f868238e0468b39523d">  536</a></span><span class="preprocessor">#define NVIC_BASE           (SCS_BASE +  0x0100UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00537" name="l00537"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gad55a7ddb8d4b2398b0c1cfec76c0d9fd">  537</a></span><span class="preprocessor">#define SCB_BASE            (SCS_BASE +  0x0D00UL)                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00538" name="l00538"></a><span class="lineno">  538</span> </div>
<div class="line"><a id="l00539" name="l00539"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">  539</a></span><span class="preprocessor">#define SCB                 ((SCB_Type       *)     SCB_BASE      )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00540" name="l00540"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">  540</a></span><span class="preprocessor">#define SysTick             ((SysTick_Type   *)     SysTick_BASE  )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00541" name="l00541"></a><span class="lineno"><a class="line" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">  541</a></span><span class="preprocessor">#define NVIC                ((NVIC_Type      *)     NVIC_BASE     )   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00542" name="l00542"></a><span class="lineno">  542</span> </div>
<div class="line"><a id="l00543" name="l00543"></a><span class="lineno">  543</span></div>
<div class="line"><a id="l00545" name="l00545"></a><span class="lineno">  545</span> </div>
<div class="line"><a id="l00546" name="l00546"></a><span class="lineno">  546</span> </div>
<div class="line"><a id="l00547" name="l00547"></a><span class="lineno">  547</span> </div>
<div class="line"><a id="l00548" name="l00548"></a><span class="lineno">  548</span><span class="comment">/*******************************************************************************</span></div>
<div class="line"><a id="l00549" name="l00549"></a><span class="lineno">  549</span><span class="comment"> *                Hardware Abstraction Layer</span></div>
<div class="line"><a id="l00550" name="l00550"></a><span class="lineno">  550</span><span class="comment">  Core Function Interface contains:</span></div>
<div class="line"><a id="l00551" name="l00551"></a><span class="lineno">  551</span><span class="comment">  - Core NVIC Functions</span></div>
<div class="line"><a id="l00552" name="l00552"></a><span class="lineno">  552</span><span class="comment">  - Core SysTick Functions</span></div>
<div class="line"><a id="l00553" name="l00553"></a><span class="lineno">  553</span><span class="comment">  - Core Register Access Functions</span></div>
<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span><span class="comment"> ******************************************************************************/</span></div>
<div class="line"><a id="l00558" name="l00558"></a><span class="lineno">  558</span> </div>
<div class="line"><a id="l00559" name="l00559"></a><span class="lineno">  559</span> </div>
<div class="line"><a id="l00560" name="l00560"></a><span class="lineno">  560</span> </div>
<div class="line"><a id="l00561" name="l00561"></a><span class="lineno">  561</span><span class="comment">/* ##########################   NVIC functions  #################################### */</span></div>
<div class="line"><a id="l00568" name="l00568"></a><span class="lineno">  568</span> </div>
<div class="line"><a id="l00569" name="l00569"></a><span class="lineno">  569</span><span class="preprocessor">#ifdef CMSIS_NVIC_VIRTUAL</span></div>
<div class="line"><a id="l00570" name="l00570"></a><span class="lineno">  570</span><span class="preprocessor">  #ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l00571" name="l00571"></a><span class="lineno">  571</span><span class="preprocessor">    #define CMSIS_NVIC_VIRTUAL_HEADER_FILE &quot;cmsis_nvic_virtual.h&quot;</span></div>
<div class="line"><a id="l00572" name="l00572"></a><span class="lineno">  572</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00573" name="l00573"></a><span class="lineno">  573</span><span class="preprocessor">  #include CMSIS_NVIC_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l00574" name="l00574"></a><span class="lineno">  574</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00575" name="l00575"></a><span class="lineno">  575</span><span class="preprocessor">  #define NVIC_SetPriorityGrouping    __NVIC_SetPriorityGrouping</span></div>
<div class="line"><a id="l00576" name="l00576"></a><span class="lineno">  576</span><span class="preprocessor">  #define NVIC_GetPriorityGrouping    __NVIC_GetPriorityGrouping</span></div>
<div class="line"><a id="l00577" name="l00577"></a><span class="lineno">  577</span><span class="preprocessor">  #define NVIC_EnableIRQ              __NVIC_EnableIRQ</span></div>
<div class="line"><a id="l00578" name="l00578"></a><span class="lineno">  578</span><span class="preprocessor">  #define NVIC_GetEnableIRQ           __NVIC_GetEnableIRQ</span></div>
<div class="line"><a id="l00579" name="l00579"></a><span class="lineno">  579</span><span class="preprocessor">  #define NVIC_DisableIRQ             __NVIC_DisableIRQ</span></div>
<div class="line"><a id="l00580" name="l00580"></a><span class="lineno">  580</span><span class="preprocessor">  #define NVIC_GetPendingIRQ          __NVIC_GetPendingIRQ</span></div>
<div class="line"><a id="l00581" name="l00581"></a><span class="lineno">  581</span><span class="preprocessor">  #define NVIC_SetPendingIRQ          __NVIC_SetPendingIRQ</span></div>
<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span><span class="preprocessor">  #define NVIC_ClearPendingIRQ        __NVIC_ClearPendingIRQ</span></div>
<div class="line"><a id="l00583" name="l00583"></a><span class="lineno">  583</span><span class="comment">/*#define NVIC_GetActive              __NVIC_GetActive             not available for Cortex-M0 */</span></div>
<div class="line"><a id="l00584" name="l00584"></a><span class="lineno">  584</span><span class="preprocessor">  #define NVIC_SetPriority            __NVIC_SetPriority</span></div>
<div class="line"><a id="l00585" name="l00585"></a><span class="lineno">  585</span><span class="preprocessor">  #define NVIC_GetPriority            __NVIC_GetPriority</span></div>
<div class="line"><a id="l00586" name="l00586"></a><span class="lineno">  586</span><span class="preprocessor">  #define NVIC_SystemReset            __NVIC_SystemReset</span></div>
<div class="line"><a id="l00587" name="l00587"></a><span class="lineno">  587</span><span class="preprocessor">#endif </span><span class="comment">/* CMSIS_NVIC_VIRTUAL */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00588" name="l00588"></a><span class="lineno">  588</span> </div>
<div class="line"><a id="l00589" name="l00589"></a><span class="lineno">  589</span><span class="preprocessor">#ifdef CMSIS_VECTAB_VIRTUAL</span></div>
<div class="line"><a id="l00590" name="l00590"></a><span class="lineno">  590</span><span class="preprocessor">  #ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l00591" name="l00591"></a><span class="lineno">  591</span><span class="preprocessor">    #define CMSIS_VECTAB_VIRTUAL_HEADER_FILE &quot;cmsis_vectab_virtual.h&quot;</span></div>
<div class="line"><a id="l00592" name="l00592"></a><span class="lineno">  592</span><span class="preprocessor">  #endif</span></div>
<div class="line"><a id="l00593" name="l00593"></a><span class="lineno">  593</span><span class="preprocessor">  #include CMSIS_VECTAB_VIRTUAL_HEADER_FILE</span></div>
<div class="line"><a id="l00594" name="l00594"></a><span class="lineno">  594</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00595" name="l00595"></a><span class="lineno">  595</span><span class="preprocessor">  #define NVIC_SetVector              __NVIC_SetVector</span></div>
<div class="line"><a id="l00596" name="l00596"></a><span class="lineno">  596</span><span class="preprocessor">  #define NVIC_GetVector              __NVIC_GetVector</span></div>
<div class="line"><a id="l00597" name="l00597"></a><span class="lineno">  597</span><span class="preprocessor">#endif  </span><span class="comment">/* (CMSIS_VECTAB_VIRTUAL) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00598" name="l00598"></a><span class="lineno">  598</span> </div>
<div class="line"><a id="l00599" name="l00599"></a><span class="lineno">  599</span><span class="preprocessor">#define NVIC_USER_IRQ_OFFSET          16</span></div>
<div class="line"><a id="l00600" name="l00600"></a><span class="lineno">  600</span> </div>
<div class="line"><a id="l00601" name="l00601"></a><span class="lineno">  601</span> </div>
<div class="line"><a id="l00602" name="l00602"></a><span class="lineno">  602</span><span class="comment">/* The following EXC_RETURN values are saved the LR on exception entry */</span></div>
<div class="line"><a id="l00603" name="l00603"></a><span class="lineno">  603</span><span class="preprocessor">#define EXC_RETURN_HANDLER         (0xFFFFFFF1UL)     </span><span class="comment">/* return to Handler mode, uses MSP after return                               */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00604" name="l00604"></a><span class="lineno">  604</span><span class="preprocessor">#define EXC_RETURN_THREAD_MSP      (0xFFFFFFF9UL)     </span><span class="comment">/* return to Thread mode, uses MSP after return                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00605" name="l00605"></a><span class="lineno">  605</span><span class="preprocessor">#define EXC_RETURN_THREAD_PSP      (0xFFFFFFFDUL)     </span><span class="comment">/* return to Thread mode, uses PSP after return                                */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00606" name="l00606"></a><span class="lineno">  606</span> </div>
<div class="line"><a id="l00607" name="l00607"></a><span class="lineno">  607</span> </div>
<div class="line"><a id="l00608" name="l00608"></a><span class="lineno">  608</span><span class="comment">/* Interrupt Priorities are WORD accessible only under Armv6-M                  */</span></div>
<div class="line"><a id="l00609" name="l00609"></a><span class="lineno">  609</span><span class="comment">/* The following MACROS handle generation of the register offset and byte masks */</span></div>
<div class="line"><a id="l00610" name="l00610"></a><span class="lineno">  610</span><span class="preprocessor">#define _BIT_SHIFT(IRQn)         (  ((((uint32_t)(int32_t)(IRQn))         )      &amp;  0x03UL) * 8UL)</span></div>
<div class="line"><a id="l00611" name="l00611"></a><span class="lineno">  611</span><span class="preprocessor">#define _SHP_IDX(IRQn)           ( (((((uint32_t)(int32_t)(IRQn)) &amp; 0x0FUL)-8UL) &gt;&gt;    2UL)      )</span></div>
<div class="line"><a id="l00612" name="l00612"></a><span class="lineno">  612</span><span class="preprocessor">#define _IP_IDX(IRQn)            (   (((uint32_t)(int32_t)(IRQn))                &gt;&gt;    2UL)      )</span></div>
<div class="line"><a id="l00613" name="l00613"></a><span class="lineno">  613</span> </div>
<div class="line"><a id="l00614" name="l00614"></a><span class="lineno">  614</span><span class="preprocessor">#define __NVIC_SetPriorityGrouping(X) (void)(X)</span></div>
<div class="line"><a id="l00615" name="l00615"></a><span class="lineno">  615</span><span class="preprocessor">#define __NVIC_GetPriorityGrouping()  (0U)</span></div>
<div class="line"><a id="l00616" name="l00616"></a><span class="lineno">  616</span></div>
<div class="line"><a id="l00623" name="l00623"></a><span class="lineno">  623</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga71227e1376cde11eda03fcb62f1b33ea">__NVIC_EnableIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00624" name="l00624"></a><span class="lineno">  624</span>{</div>
<div class="line"><a id="l00625" name="l00625"></a><span class="lineno">  625</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00626" name="l00626"></a><span class="lineno">  626</span>  {</div>
<div class="line"><a id="l00627" name="l00627"></a><span class="lineno">  627</span>    __COMPILER_BARRIER();</div>
<div class="line"><a id="l00628" name="l00628"></a><span class="lineno">  628</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISER[0U] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l00629" name="l00629"></a><span class="lineno">  629</span>    __COMPILER_BARRIER();</div>
<div class="line"><a id="l00630" name="l00630"></a><span class="lineno">  630</span>  }</div>
<div class="line"><a id="l00631" name="l00631"></a><span class="lineno">  631</span>}</div>
<div class="line"><a id="l00632" name="l00632"></a><span class="lineno">  632</span> </div>
<div class="line"><a id="l00633" name="l00633"></a><span class="lineno">  633</span></div>
<div class="line"><a id="l00642" name="l00642"></a><span class="lineno">  642</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaaeb5e7cc0eaad4e2817272e7bf742083">__NVIC_GetEnableIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00643" name="l00643"></a><span class="lineno">  643</span>{</div>
<div class="line"><a id="l00644" name="l00644"></a><span class="lineno">  644</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00645" name="l00645"></a><span class="lineno">  645</span>  {</div>
<div class="line"><a id="l00646" name="l00646"></a><span class="lineno">  646</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISER[0U] &amp; (1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL))) != 0UL) ? 1UL : 0UL));</div>
<div class="line"><a id="l00647" name="l00647"></a><span class="lineno">  647</span>  }</div>
<div class="line"><a id="l00648" name="l00648"></a><span class="lineno">  648</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l00649" name="l00649"></a><span class="lineno">  649</span>  {</div>
<div class="line"><a id="l00650" name="l00650"></a><span class="lineno">  650</span>    <span class="keywordflow">return</span>(0U);</div>
<div class="line"><a id="l00651" name="l00651"></a><span class="lineno">  651</span>  }</div>
<div class="line"><a id="l00652" name="l00652"></a><span class="lineno">  652</span>}</div>
<div class="line"><a id="l00653" name="l00653"></a><span class="lineno">  653</span> </div>
<div class="line"><a id="l00654" name="l00654"></a><span class="lineno">  654</span></div>
<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae016e4c1986312044ee768806537d52f">__NVIC_DisableIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00662" name="l00662"></a><span class="lineno">  662</span>{</div>
<div class="line"><a id="l00663" name="l00663"></a><span class="lineno">  663</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00664" name="l00664"></a><span class="lineno">  664</span>  {</div>
<div class="line"><a id="l00665" name="l00665"></a><span class="lineno">  665</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ICER[0U] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l00666" name="l00666"></a><span class="lineno">  666</span>    <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();</div>
<div class="line"><a id="l00667" name="l00667"></a><span class="lineno">  667</span>    <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a>();</div>
<div class="line"><a id="l00668" name="l00668"></a><span class="lineno">  668</span>  }</div>
<div class="line"><a id="l00669" name="l00669"></a><span class="lineno">  669</span>}</div>
<div class="line"><a id="l00670" name="l00670"></a><span class="lineno">  670</span> </div>
<div class="line"><a id="l00671" name="l00671"></a><span class="lineno">  671</span></div>
<div class="line"><a id="l00680" name="l00680"></a><span class="lineno">  680</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga5a92ca5fa801ad7adb92be7257ab9694">__NVIC_GetPendingIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00681" name="l00681"></a><span class="lineno">  681</span>{</div>
<div class="line"><a id="l00682" name="l00682"></a><span class="lineno">  682</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span>  {</div>
<div class="line"><a id="l00684" name="l00684"></a><span class="lineno">  684</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISPR[0U] &amp; (1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL))) != 0UL) ? 1UL : 0UL));</div>
<div class="line"><a id="l00685" name="l00685"></a><span class="lineno">  685</span>  }</div>
<div class="line"><a id="l00686" name="l00686"></a><span class="lineno">  686</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l00687" name="l00687"></a><span class="lineno">  687</span>  {</div>
<div class="line"><a id="l00688" name="l00688"></a><span class="lineno">  688</span>    <span class="keywordflow">return</span>(0U);</div>
<div class="line"><a id="l00689" name="l00689"></a><span class="lineno">  689</span>  }</div>
<div class="line"><a id="l00690" name="l00690"></a><span class="lineno">  690</span>}</div>
<div class="line"><a id="l00691" name="l00691"></a><span class="lineno">  691</span> </div>
<div class="line"><a id="l00692" name="l00692"></a><span class="lineno">  692</span></div>
<div class="line"><a id="l00699" name="l00699"></a><span class="lineno">  699</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaabefdd4b790b9a7308929938c0c1e1ad">__NVIC_SetPendingIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00700" name="l00700"></a><span class="lineno">  700</span>{</div>
<div class="line"><a id="l00701" name="l00701"></a><span class="lineno">  701</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00702" name="l00702"></a><span class="lineno">  702</span>  {</div>
<div class="line"><a id="l00703" name="l00703"></a><span class="lineno">  703</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ISPR[0U] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l00704" name="l00704"></a><span class="lineno">  704</span>  }</div>
<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span>}</div>
<div class="line"><a id="l00706" name="l00706"></a><span class="lineno">  706</span> </div>
<div class="line"><a id="l00707" name="l00707"></a><span class="lineno">  707</span></div>
<div class="line"><a id="l00714" name="l00714"></a><span class="lineno">  714</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga562a86dbdf14827d0fee8fdafb04d191">__NVIC_ClearPendingIRQ</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00715" name="l00715"></a><span class="lineno">  715</span>{</div>
<div class="line"><a id="l00716" name="l00716"></a><span class="lineno">  716</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00717" name="l00717"></a><span class="lineno">  717</span>  {</div>
<div class="line"><a id="l00718" name="l00718"></a><span class="lineno">  718</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;ICPR[0U] = (uint32_t)(1UL &lt;&lt; (((uint32_t)IRQn) &amp; 0x1FUL));</div>
<div class="line"><a id="l00719" name="l00719"></a><span class="lineno">  719</span>  }</div>
<div class="line"><a id="l00720" name="l00720"></a><span class="lineno">  720</span>}</div>
<div class="line"><a id="l00721" name="l00721"></a><span class="lineno">  721</span> </div>
<div class="line"><a id="l00722" name="l00722"></a><span class="lineno">  722</span></div>
<div class="line"><a id="l00732" name="l00732"></a><span class="lineno">  732</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga505338e23563a9c074910fb14e7d45fd">__NVIC_SetPriority</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t priority)</div>
<div class="line"><a id="l00733" name="l00733"></a><span class="lineno">  733</span>{</div>
<div class="line"><a id="l00734" name="l00734"></a><span class="lineno">  734</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno">  735</span>  {</div>
<div class="line"><a id="l00736" name="l00736"></a><span class="lineno">  736</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;IP[_IP_IDX(IRQn)]  = ((uint32_t)(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;IP[_IP_IDX(IRQn)]  &amp; ~(0xFFUL &lt;&lt; _BIT_SHIFT(IRQn))) |</div>
<div class="line"><a id="l00737" name="l00737"></a><span class="lineno">  737</span>       (((priority &lt;&lt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &amp; (uint32_t)0xFFUL) &lt;&lt; _BIT_SHIFT(IRQn)));</div>
<div class="line"><a id="l00738" name="l00738"></a><span class="lineno">  738</span>  }</div>
<div class="line"><a id="l00739" name="l00739"></a><span class="lineno">  739</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l00740" name="l00740"></a><span class="lineno">  740</span>  {</div>
<div class="line"><a id="l00741" name="l00741"></a><span class="lineno">  741</span>    <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHP[_SHP_IDX(IRQn)] = ((uint32_t)(<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHP[_SHP_IDX(IRQn)] &amp; ~(0xFFUL &lt;&lt; _BIT_SHIFT(IRQn))) |</div>
<div class="line"><a id="l00742" name="l00742"></a><span class="lineno">  742</span>       (((priority &lt;&lt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &amp; (uint32_t)0xFFUL) &lt;&lt; _BIT_SHIFT(IRQn)));</div>
<div class="line"><a id="l00743" name="l00743"></a><span class="lineno">  743</span>  }</div>
<div class="line"><a id="l00744" name="l00744"></a><span class="lineno">  744</span>}</div>
<div class="line"><a id="l00745" name="l00745"></a><span class="lineno">  745</span> </div>
<div class="line"><a id="l00746" name="l00746"></a><span class="lineno">  746</span></div>
<div class="line"><a id="l00756" name="l00756"></a><span class="lineno">  756</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaeb9dc99c8e7700668813144261b0bc73">__NVIC_GetPriority</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00757" name="l00757"></a><span class="lineno">  757</span>{</div>
<div class="line"><a id="l00758" name="l00758"></a><span class="lineno">  758</span> </div>
<div class="line"><a id="l00759" name="l00759"></a><span class="lineno">  759</span>  <span class="keywordflow">if</span> ((int32_t)(IRQn) &gt;= 0)</div>
<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span>  {</div>
<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a>-&gt;IP[ _IP_IDX(IRQn)] &gt;&gt; _BIT_SHIFT(IRQn) ) &amp; (uint32_t)0xFFUL) &gt;&gt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)));</div>
<div class="line"><a id="l00762" name="l00762"></a><span class="lineno">  762</span>  }</div>
<div class="line"><a id="l00763" name="l00763"></a><span class="lineno">  763</span>  <span class="keywordflow">else</span></div>
<div class="line"><a id="l00764" name="l00764"></a><span class="lineno">  764</span>  {</div>
<div class="line"><a id="l00765" name="l00765"></a><span class="lineno">  765</span>    <span class="keywordflow">return</span>((uint32_t)(((<a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;SHP[_SHP_IDX(IRQn)] &gt;&gt; _BIT_SHIFT(IRQn) ) &amp; (uint32_t)0xFFUL) &gt;&gt; (8U - <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)));</div>
<div class="line"><a id="l00766" name="l00766"></a><span class="lineno">  766</span>  }</div>
<div class="line"><a id="l00767" name="l00767"></a><span class="lineno">  767</span>}</div>
<div class="line"><a id="l00768" name="l00768"></a><span class="lineno">  768</span> </div>
<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span></div>
<div class="line"><a id="l00781" name="l00781"></a><span class="lineno">  781</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gadb94ac5d892b376e4f3555ae0418ebac">NVIC_EncodePriority</a> (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</div>
<div class="line"><a id="l00782" name="l00782"></a><span class="lineno">  782</span>{</div>
<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span>  uint32_t PriorityGroupTmp = (PriorityGroup &amp; (uint32_t)0x07UL);   <span class="comment">/* only values 0..7 are used          */</span></div>
<div class="line"><a id="l00784" name="l00784"></a><span class="lineno">  784</span>  uint32_t PreemptPriorityBits;</div>
<div class="line"><a id="l00785" name="l00785"></a><span class="lineno">  785</span>  uint32_t SubPriorityBits;</div>
<div class="line"><a id="l00786" name="l00786"></a><span class="lineno">  786</span> </div>
<div class="line"><a id="l00787" name="l00787"></a><span class="lineno">  787</span>  PreemptPriorityBits = ((7UL - PriorityGroupTmp) &gt; (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) ? (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>) : (uint32_t)(7UL - PriorityGroupTmp);</div>
<div class="line"><a id="l00788" name="l00788"></a><span class="lineno">  788</span>  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &lt; (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>));</div>
<div class="line"><a id="l00789" name="l00789"></a><span class="lineno">  789</span> </div>
<div class="line"><a id="l00790" name="l00790"></a><span class="lineno">  790</span>  <span class="keywordflow">return</span> (</div>
<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span>           ((PreemptPriority &amp; (uint32_t)((1UL &lt;&lt; (PreemptPriorityBits)) - 1UL)) &lt;&lt; SubPriorityBits) |</div>
<div class="line"><a id="l00792" name="l00792"></a><span class="lineno">  792</span>           ((SubPriority     &amp; (uint32_t)((1UL &lt;&lt; (SubPriorityBits    )) - 1UL)))</div>
<div class="line"><a id="l00793" name="l00793"></a><span class="lineno">  793</span>         );</div>
<div class="line"><a id="l00794" name="l00794"></a><span class="lineno">  794</span>}</div>
<div class="line"><a id="l00795" name="l00795"></a><span class="lineno">  795</span> </div>
<div class="line"><a id="l00796" name="l00796"></a><span class="lineno">  796</span></div>
<div class="line"><a id="l00808" name="l00808"></a><span class="lineno">  808</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga3387607fd8a1a32cccd77d2ac672dd96">NVIC_DecodePriority</a> (uint32_t Priority, uint32_t PriorityGroup, uint32_t* <span class="keyword">const</span> pPreemptPriority, uint32_t* <span class="keyword">const</span> pSubPriority)</div>
<div class="line"><a id="l00809" name="l00809"></a><span class="lineno">  809</span>{</div>
<div class="line"><a id="l00810" name="l00810"></a><span class="lineno">  810</span>  uint32_t PriorityGroupTmp = (PriorityGroup &amp; (uint32_t)0x07UL);   <span class="comment">/* only values 0..7 are used          */</span></div>
<div class="line"><a id="l00811" name="l00811"></a><span class="lineno">  811</span>  uint32_t PreemptPriorityBits;</div>
<div class="line"><a id="l00812" name="l00812"></a><span class="lineno">  812</span>  uint32_t SubPriorityBits;</div>
<div class="line"><a id="l00813" name="l00813"></a><span class="lineno">  813</span> </div>
<div class="line"><a id="l00814" name="l00814"></a><span class="lineno">  814</span>  PreemptPriorityBits = ((7UL - PriorityGroupTmp) &gt; (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) ? (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>) : (uint32_t)(7UL - PriorityGroupTmp);</div>
<div class="line"><a id="l00815" name="l00815"></a><span class="lineno">  815</span>  SubPriorityBits     = ((PriorityGroupTmp + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>)) &lt; (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(<a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>));</div>
<div class="line"><a id="l00816" name="l00816"></a><span class="lineno">  816</span> </div>
<div class="line"><a id="l00817" name="l00817"></a><span class="lineno">  817</span>  *pPreemptPriority = (Priority &gt;&gt; SubPriorityBits) &amp; (uint32_t)((1UL &lt;&lt; (PreemptPriorityBits)) - 1UL);</div>
<div class="line"><a id="l00818" name="l00818"></a><span class="lineno">  818</span>  *pSubPriority     = (Priority                   ) &amp; (uint32_t)((1UL &lt;&lt; (SubPriorityBits    )) - 1UL);</div>
<div class="line"><a id="l00819" name="l00819"></a><span class="lineno">  819</span>}</div>
<div class="line"><a id="l00820" name="l00820"></a><span class="lineno">  820</span> </div>
<div class="line"><a id="l00821" name="l00821"></a><span class="lineno">  821</span> </div>
<div class="line"><a id="l00822" name="l00822"></a><span class="lineno">  822</span></div>
<div class="line"><a id="l00832" name="l00832"></a><span class="lineno">  832</span>__STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0df355460bc1783d58f9d72ee4884208">__NVIC_SetVector</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn, uint32_t vector)</div>
<div class="line"><a id="l00833" name="l00833"></a><span class="lineno">  833</span>{</div>
<div class="line"><a id="l00834" name="l00834"></a><span class="lineno">  834</span>  uint32_t vectors = 0x0U;</div>
<div class="line"><a id="l00835" name="l00835"></a><span class="lineno">  835</span>  (* (<span class="keywordtype">int</span> *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4)) = vector;</div>
<div class="line"><a id="l00836" name="l00836"></a><span class="lineno">  836</span>  <span class="comment">/* ARM Application Note 321 states that the M0 does not require the architectural barrier */</span></div>
<div class="line"><a id="l00837" name="l00837"></a><span class="lineno">  837</span>}</div>
<div class="line"><a id="l00838" name="l00838"></a><span class="lineno">  838</span> </div>
<div class="line"><a id="l00839" name="l00839"></a><span class="lineno">  839</span></div>
<div class="line"><a id="l00848" name="l00848"></a><span class="lineno">  848</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga44b665d2afb708121d9b10c76ff00ee5">__NVIC_GetVector</a>(<a class="code hl_enumeration" href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a> IRQn)</div>
<div class="line"><a id="l00849" name="l00849"></a><span class="lineno">  849</span>{</div>
<div class="line"><a id="l00850" name="l00850"></a><span class="lineno">  850</span>  uint32_t vectors = 0x0U;</div>
<div class="line"><a id="l00851" name="l00851"></a><span class="lineno">  851</span>  <span class="keywordflow">return</span> (uint32_t)(* (<span class="keywordtype">int</span> *) (vectors + ((int32_t)IRQn + NVIC_USER_IRQ_OFFSET) * 4));</div>
<div class="line"><a id="l00852" name="l00852"></a><span class="lineno">  852</span>}</div>
<div class="line"><a id="l00853" name="l00853"></a><span class="lineno">  853</span> </div>
<div class="line"><a id="l00854" name="l00854"></a><span class="lineno">  854</span></div>
<div class="line"><a id="l00859" name="l00859"></a><span class="lineno">  859</span>__NO_RETURN __STATIC_INLINE <span class="keywordtype">void</span> <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0d9aa2d30fa54b41eb780c16e35b676c">__NVIC_SystemReset</a>(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00860" name="l00860"></a><span class="lineno">  860</span>{</div>
<div class="line"><a id="l00861" name="l00861"></a><span class="lineno">  861</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();                                                          <span class="comment">/* Ensure all outstanding memory accesses included</span></div>
<div class="line"><a id="l00862" name="l00862"></a><span class="lineno">  862</span><span class="comment">                                                                       buffered write are completed before reset */</span></div>
<div class="line"><a id="l00863" name="l00863"></a><span class="lineno">  863</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a>-&gt;AIRCR  = ((0x5FAUL &lt;&lt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">SCB_AIRCR_VECTKEY_Pos</a>) |</div>
<div class="line"><a id="l00864" name="l00864"></a><span class="lineno">  864</span>                 <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaae1181119559a5bd36e62afa373fa720">SCB_AIRCR_SYSRESETREQ_Msk</a>);</div>
<div class="line"><a id="l00865" name="l00865"></a><span class="lineno">  865</span>  <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a>();                                                          <span class="comment">/* Ensure completion of memory access */</span></div>
<div class="line"><a id="l00866" name="l00866"></a><span class="lineno">  866</span> </div>
<div class="line"><a id="l00867" name="l00867"></a><span class="lineno">  867</span>  <span class="keywordflow">for</span>(;;)                                                           <span class="comment">/* wait until reset */</span></div>
<div class="line"><a id="l00868" name="l00868"></a><span class="lineno">  868</span>  {</div>
<div class="line"><a id="l00869" name="l00869"></a><span class="lineno">  869</span>    <a class="code hl_define" href="group___c_m_s_i_s___core___instruction_interface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a>();</div>
<div class="line"><a id="l00870" name="l00870"></a><span class="lineno">  870</span>  }</div>
<div class="line"><a id="l00871" name="l00871"></a><span class="lineno">  871</span>}</div>
<div class="line"><a id="l00872" name="l00872"></a><span class="lineno">  872</span></div>
<div class="line"><a id="l00874" name="l00874"></a><span class="lineno">  874</span> </div>
<div class="line"><a id="l00875" name="l00875"></a><span class="lineno">  875</span> </div>
<div class="line"><a id="l00876" name="l00876"></a><span class="lineno">  876</span><span class="comment">/* ##########################  FPU functions  #################################### */</span></div>
<div class="line"><a id="l00883" name="l00883"></a><span class="lineno">  883</span></div>
<div class="line"><a id="l00892" name="l00892"></a><span class="lineno">  892</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a>(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00893" name="l00893"></a><span class="lineno">  893</span>{</div>
<div class="line"><a id="l00894" name="l00894"></a><span class="lineno">  894</span>    <span class="keywordflow">return</span> 0U;           <span class="comment">/* No FPU */</span></div>
<div class="line"><a id="l00895" name="l00895"></a><span class="lineno">  895</span>}</div>
<div class="line"><a id="l00896" name="l00896"></a><span class="lineno">  896</span> </div>
<div class="line"><a id="l00897" name="l00897"></a><span class="lineno">  897</span></div>
<div class="line"><a id="l00899" name="l00899"></a><span class="lineno">  899</span> </div>
<div class="line"><a id="l00900" name="l00900"></a><span class="lineno">  900</span> </div>
<div class="line"><a id="l00901" name="l00901"></a><span class="lineno">  901</span> </div>
<div class="line"><a id="l00902" name="l00902"></a><span class="lineno">  902</span><span class="comment">/* ##################################    SysTick function  ############################################ */</span></div>
<div class="line"><a id="l00909" name="l00909"></a><span class="lineno">  909</span> </div>
<div class="line"><a id="l00910" name="l00910"></a><span class="lineno">  910</span><span class="preprocessor">#if defined (__Vendor_SysTickConfig) &amp;&amp; (__Vendor_SysTickConfig == 0U)</span></div>
<div class="line"><a id="l00911" name="l00911"></a><span class="lineno">  911</span></div>
<div class="line"><a id="l00923" name="l00923"></a><span class="lineno">  923</span>__STATIC_INLINE uint32_t <a class="code hl_function" href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae4e8f0238527c69f522029b93c8e5b78">SysTick_Config</a>(uint32_t ticks)</div>
<div class="line"><a id="l00924" name="l00924"></a><span class="lineno">  924</span>{</div>
<div class="line"><a id="l00925" name="l00925"></a><span class="lineno">  925</span>  <span class="keywordflow">if</span> ((ticks - 1UL) &gt; <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga265912a7962f0e1abd170336e579b1b1">SysTick_LOAD_RELOAD_Msk</a>)</div>
<div class="line"><a id="l00926" name="l00926"></a><span class="lineno">  926</span>  {</div>
<div class="line"><a id="l00927" name="l00927"></a><span class="lineno">  927</span>    <span class="keywordflow">return</span> (1UL);                                                   <span class="comment">/* Reload value impossible */</span></div>
<div class="line"><a id="l00928" name="l00928"></a><span class="lineno">  928</span>  }</div>
<div class="line"><a id="l00929" name="l00929"></a><span class="lineno">  929</span> </div>
<div class="line"><a id="l00930" name="l00930"></a><span class="lineno">  930</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a>-&gt;LOAD  = (uint32_t)(ticks - 1UL);                         <span class="comment">/* set reload register */</span></div>
<div class="line"><a id="l00931" name="l00931"></a><span class="lineno">  931</span>  NVIC_SetPriority (<a class="code hl_enumvalue" href="group___peripheral__interrupt__number__definition.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a>, (1UL &lt;&lt; <a class="code hl_define" href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a>) - 1UL); <span class="comment">/* set Priority for Systick Interrupt */</span></div>
<div class="line"><a id="l00932" name="l00932"></a><span class="lineno">  932</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a>-&gt;VAL   = 0UL;                                             <span class="comment">/* Load the SysTick Counter Value */</span></div>
<div class="line"><a id="l00933" name="l00933"></a><span class="lineno">  933</span>  <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a>-&gt;CTRL  = <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#gaa41d06039797423a46596bd313d57373">SysTick_CTRL_CLKSOURCE_Msk</a> |</div>
<div class="line"><a id="l00934" name="l00934"></a><span class="lineno">  934</span>                   <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga95bb984266ca764024836a870238a027">SysTick_CTRL_TICKINT_Msk</a>   |</div>
<div class="line"><a id="l00935" name="l00935"></a><span class="lineno">  935</span>                   <a class="code hl_define" href="group___c_m_s_i_s___c_o_r_e.html#ga16c9fee0ed0235524bdeb38af328fd1f">SysTick_CTRL_ENABLE_Msk</a>;                         <span class="comment">/* Enable SysTick IRQ and SysTick Timer */</span></div>
<div class="line"><a id="l00936" name="l00936"></a><span class="lineno">  936</span>  <span class="keywordflow">return</span> (0UL);                                                     <span class="comment">/* Function successful */</span></div>
<div class="line"><a id="l00937" name="l00937"></a><span class="lineno">  937</span>}</div>
<div class="line"><a id="l00938" name="l00938"></a><span class="lineno">  938</span> </div>
<div class="line"><a id="l00939" name="l00939"></a><span class="lineno">  939</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00940" name="l00940"></a><span class="lineno">  940</span></div>
<div class="line"><a id="l00942" name="l00942"></a><span class="lineno">  942</span> </div>
<div class="line"><a id="l00943" name="l00943"></a><span class="lineno">  943</span> </div>
<div class="line"><a id="l00944" name="l00944"></a><span class="lineno">  944</span> </div>
<div class="line"><a id="l00945" name="l00945"></a><span class="lineno">  945</span> </div>
<div class="line"><a id="l00946" name="l00946"></a><span class="lineno">  946</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00947" name="l00947"></a><span class="lineno">  947</span>}</div>
<div class="line"><a id="l00948" name="l00948"></a><span class="lineno">  948</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00949" name="l00949"></a><span class="lineno">  949</span> </div>
<div class="line"><a id="l00950" name="l00950"></a><span class="lineno">  950</span><span class="preprocessor">#endif </span><span class="comment">/* __CORE_CM0_H_DEPENDANT */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00951" name="l00951"></a><span class="lineno">  951</span> </div>
<div class="line"><a id="l00952" name="l00952"></a><span class="lineno">  952</span><span class="preprocessor">#endif </span><span class="comment">/* __CMSIS_GENERIC */</span><span class="preprocessor"></span></div>
<div class="ttc" id="acmsis__compiler_8h_html"><div class="ttname"><a href="cmsis__compiler_8h.html">cmsis_compiler.h</a></div><div class="ttdoc">CMSIS compiler generic header file.</div></div>
<div class="ttc" id="acmsis__version_8h_html"><div class="ttname"><a href="cmsis__version_8h.html">cmsis_version.h</a></div><div class="ttdoc">CMSIS Core(M) Version definitions.</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga16c9fee0ed0235524bdeb38af328fd1f"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga16c9fee0ed0235524bdeb38af328fd1f">SysTick_CTRL_ENABLE_Msk</a></div><div class="ttdeci">#define SysTick_CTRL_ENABLE_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1054</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga265912a7962f0e1abd170336e579b1b1"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga265912a7962f0e1abd170336e579b1b1">SysTick_LOAD_RELOAD_Msk</a></div><div class="ttdeci">#define SysTick_LOAD_RELOAD_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1058</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_ga95bb984266ca764024836a870238a027"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#ga95bb984266ca764024836a870238a027">SysTick_CTRL_TICKINT_Msk</a></div><div class="ttdeci">#define SysTick_CTRL_TICKINT_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1051</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaa41d06039797423a46596bd313d57373"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaa41d06039797423a46596bd313d57373">SysTick_CTRL_CLKSOURCE_Msk</a></div><div class="ttdeci">#define SysTick_CTRL_CLKSOURCE_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1048</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaaa27c0ba600bf82c3da08c748845b640"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaaa27c0ba600bf82c3da08c748845b640">SCB_AIRCR_VECTKEY_Pos</a></div><div class="ttdeci">#define SCB_AIRCR_VECTKEY_Pos</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:613</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaaaf6477c2bde2f00f99e3c2fd1060b01"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaaaf6477c2bde2f00f99e3c2fd1060b01">SCB</a></div><div class="ttdeci">#define SCB</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2044</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gaae1181119559a5bd36e62afa373fa720"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gaae1181119559a5bd36e62afa373fa720">SCB_AIRCR_SYSRESETREQ_Msk</a></div><div class="ttdeci">#define SCB_AIRCR_SYSRESETREQ_Msk</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:635</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gac8e97e8ce56ae9f57da1363a937f8a17"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gac8e97e8ce56ae9f57da1363a937f8a17">NVIC</a></div><div class="ttdeci">#define NVIC</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2046</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___c_o_r_e_html_gacd96c53beeaff8f603fcda425eb295de"><div class="ttname"><a href="group___c_m_s_i_s___c_o_r_e.html#gacd96c53beeaff8f603fcda425eb295de">SysTick</a></div><div class="ttdeci">#define SysTick</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2045</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_ga067d257a2b34565410acefb5afef2203"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#ga067d257a2b34565410acefb5afef2203">__DSB</a></div><div class="ttdeci">#define __DSB()</div><div class="ttdoc">Data Synchronization Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:458</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_gaad233022e850a009fc6f7602be1182f6"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#gaad233022e850a009fc6f7602be1182f6">__ISB</a></div><div class="ttdeci">#define __ISB()</div><div class="ttdoc">Instruction Synchronization Barrier.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:447</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___instruction_interface_html_gabd585ddc865fb9b7f2493af1eee1a572"><div class="ttname"><a href="group___c_m_s_i_s___core___instruction_interface.html#gabd585ddc865fb9b7f2493af1eee1a572">__NOP</a></div><div class="ttdeci">#define __NOP</div><div class="ttdoc">No Operation.</div><div class="ttdef"><b>Definition</b> cmsis_armcc.h:416</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga0d9aa2d30fa54b41eb780c16e35b676c"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0d9aa2d30fa54b41eb780c16e35b676c">__NVIC_SystemReset</a></div><div class="ttdeci">__NO_RETURN __STATIC_INLINE void __NVIC_SystemReset(void)</div><div class="ttdoc">System Reset.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2506</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga0df355460bc1783d58f9d72ee4884208"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga0df355460bc1783d58f9d72ee4884208">__NVIC_SetVector</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)</div><div class="ttdoc">Set Interrupt Vector.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2479</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga3387607fd8a1a32cccd77d2ac672dd96"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga3387607fd8a1a32cccd77d2ac672dd96">NVIC_DecodePriority</a></div><div class="ttdeci">__STATIC_INLINE void NVIC_DecodePriority(uint32_t Priority, uint32_t PriorityGroup, uint32_t *const pPreemptPriority, uint32_t *const pSubPriority)</div><div class="ttdoc">Decode Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2456</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga44b665d2afb708121d9b10c76ff00ee5"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga44b665d2afb708121d9b10c76ff00ee5">__NVIC_GetVector</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetVector(IRQn_Type IRQn)</div><div class="ttdoc">Get Interrupt Vector.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2495</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga505338e23563a9c074910fb14e7d45fd"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga505338e23563a9c074910fb14e7d45fd">__NVIC_SetPriority</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)</div><div class="ttdoc">Set Interrupt Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2382</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga562a86dbdf14827d0fee8fdafb04d191"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga562a86dbdf14827d0fee8fdafb04d191">__NVIC_ClearPendingIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Clear Pending Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2276</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga5a92ca5fa801ad7adb92be7257ab9694"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga5a92ca5fa801ad7adb92be7257ab9694">__NVIC_GetPendingIRQ</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Get Pending Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2242</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga6bcad99ce80a0e7e4ddc6f2379081756"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga6bcad99ce80a0e7e4ddc6f2379081756">SCB_GetFPUType</a></div><div class="ttdeci">__STATIC_INLINE uint32_t SCB_GetFPUType(void)</div><div class="ttdoc">get FPU type</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2749</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_ga71227e1376cde11eda03fcb62f1b33ea"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#ga71227e1376cde11eda03fcb62f1b33ea">__NVIC_EnableIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Enable Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2187</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaabefdd4b790b9a7308929938c0c1e1ad"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaabefdd4b790b9a7308929938c0c1e1ad">__NVIC_SetPendingIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Set Pending Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2261</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaaeb5e7cc0eaad4e2817272e7bf742083"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaaeb5e7cc0eaad4e2817272e7bf742083">__NVIC_GetEnableIRQ</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetEnableIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Get Interrupt Enable status.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2204</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gadb94ac5d892b376e4f3555ae0418ebac"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gadb94ac5d892b376e4f3555ae0418ebac">NVIC_EncodePriority</a></div><div class="ttdeci">__STATIC_INLINE uint32_t NVIC_EncodePriority(uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)</div><div class="ttdoc">Encode Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2429</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gae016e4c1986312044ee768806537d52f"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae016e4c1986312044ee768806537d52f">__NVIC_DisableIRQ</a></div><div class="ttdeci">__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)</div><div class="ttdoc">Disable Interrupt.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2223</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gae4e8f0238527c69f522029b93c8e5b78"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gae4e8f0238527c69f522029b93c8e5b78">SysTick_Config</a></div><div class="ttdeci">__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)</div><div class="ttdoc">System Tick Configuration.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2831</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___n_v_i_c_functions_html_gaeb9dc99c8e7700668813144261b0bc73"><div class="ttname"><a href="group___c_m_s_i_s___core___n_v_i_c_functions.html#gaeb9dc99c8e7700668813144261b0bc73">__NVIC_GetPriority</a></div><div class="ttdeci">__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)</div><div class="ttdoc">Get Interrupt Priority.</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:2404</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga1ae7fa3814762400bb6a934c239dacaf"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga1ae7fa3814762400bb6a934c239dacaf">xPSR_Type::@347167137130112136030163355241046252252106277201::Z</a></div><div class="ttdeci">uint32_t Z</div><div class="ttdef"><b>Definition</b> core_cm0.h:257</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga28fbc14f3a92ec74abc7e1a82a5c4df6"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga28fbc14f3a92ec74abc7e1a82a5c4df6">IPSR_Type::@333166320370152070154153207332344064371246171116::ISR</a></div><div class="ttdeci">uint32_t ISR</div><div class="ttdef"><b>Definition</b> core_cm0.h:233</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga36e89dda90c6e6ca7384ca46a3fdad06"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga36e89dda90c6e6ca7384ca46a3fdad06">APSR_Type::@364224101232363265007023160230053160063027323023::C</a></div><div class="ttdeci">uint32_t C</div><div class="ttdef"><b>Definition</b> core_cm0.h:205</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga481f068e2561584e7f6cf9a9b63fbaa6"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga481f068e2561584e7f6cf9a9b63fbaa6">xPSR_Type::@347167137130112136030163355241046252252106277201::N</a></div><div class="ttdeci">uint32_t N</div><div class="ttdef"><b>Definition</b> core_cm0.h:258</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga4eef47929a0d1317a107f1ac62e28464"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga4eef47929a0d1317a107f1ac62e28464">NVIC_Type::IP</a></div><div class="ttdeci">__IOM uint32_t IP[8U]</div><div class="ttdef"><b>Definition</b> core_cm0.h:325</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga52259f5a3b281bdcf3d55fc30465cce3"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga52259f5a3b281bdcf3d55fc30465cce3">CONTROL_Type::@342327003275103171101237102025046373372214161312::SPSEL</a></div><div class="ttdeci">uint32_t SPSEL</div><div class="ttdef"><b>Definition</b> core_cm0.h:291</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga5c40d124f95a3f7f431a3d5409d6ad28"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga5c40d124f95a3f7f431a3d5409d6ad28">SCB_Type::SHP</a></div><div class="ttdeci">__IOM uint32_t SHP[2U]</div><div class="ttdef"><b>Definition</b> core_cm0.h:350</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga65932dbb8335d87fc2ff97cdb4cd7f3a"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga65932dbb8335d87fc2ff97cdb4cd7f3a">xPSR_Type::@347167137130112136030163355241046252252106277201::_reserved1</a></div><div class="ttdeci">uint32_t _reserved1</div><div class="ttdef"><b>Definition</b> core_cm0.h:254</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga74221d6ee1a06c0833c8149f3e547e7f"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga74221d6ee1a06c0833c8149f3e547e7f">IPSR_Type::@333166320370152070154153207332344064371246171116::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm0.h:234</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga849e0c8d3dba58d2792efc8571a7fdb2"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga849e0c8d3dba58d2792efc8571a7fdb2">xPSR_Type::@347167137130112136030163355241046252252106277201::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm0.h:252</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga86230d29a182c63725c8c5daa41c4ba3"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga86230d29a182c63725c8c5daa41c4ba3">xPSR_Type::@347167137130112136030163355241046252252106277201::V</a></div><div class="ttdeci">uint32_t V</div><div class="ttdef"><b>Definition</b> core_cm0.h:255</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga8693dca5a7d6ccd0a561eea73edd6ac4"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga8693dca5a7d6ccd0a561eea73edd6ac4">xPSR_Type::@347167137130112136030163355241046252252106277201::C</a></div><div class="ttdeci">uint32_t C</div><div class="ttdef"><b>Definition</b> core_cm0.h:256</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga9023adc91d8aea01f9406531c3a35eee"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga9023adc91d8aea01f9406531c3a35eee">APSR_Type::@364224101232363265007023160230053160063027323023::V</a></div><div class="ttdeci">uint32_t V</div><div class="ttdef"><b>Definition</b> core_cm0.h:204</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_ga94be0573c6a833f1f58a75152d567a7a"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#ga94be0573c6a833f1f58a75152d567a7a">APSR_Type::@364224101232363265007023160230053160063027323023::N</a></div><div class="ttdeci">uint32_t N</div><div class="ttdef"><b>Definition</b> core_cm0.h:207</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_gab762ed7623c36d850c7297cd1f24509e"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#gab762ed7623c36d850c7297cd1f24509e">APSR_Type::@364224101232363265007023160230053160063027323023::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm0.h:203</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_gac995307041a17f8629632bbb4a069d34"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#gac995307041a17f8629632bbb4a069d34">xPSR_Type::@347167137130112136030163355241046252252106277201::T</a></div><div class="ttdeci">uint32_t T</div><div class="ttdef"><b>Definition</b> core_cm0.h:253</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_gacbf57624aef414dc7da14474b1241a02"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#gacbf57624aef414dc7da14474b1241a02">xPSR_Type::@347167137130112136030163355241046252252106277201::ISR</a></div><div class="ttdeci">uint32_t ISR</div><div class="ttdef"><b>Definition</b> core_cm0.h:251</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_gad25374f026cfcb1b52773d882a602c6a"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#gad25374f026cfcb1b52773d882a602c6a">APSR_Type::@364224101232363265007023160230053160063027323023::Z</a></div><div class="ttdeci">uint32_t Z</div><div class="ttdef"><b>Definition</b> core_cm0.h:206</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_gae8e2e27dac05ce9bb09f5e4c2aca4f8a"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#gae8e2e27dac05ce9bb09f5e4c2aca4f8a">CONTROL_Type::@342327003275103171101237102025046373372214161312::_reserved1</a></div><div class="ttdeci">uint32_t _reserved1</div><div class="ttdef"><b>Definition</b> core_cm0.h:292</div></div>
<div class="ttc" id="agroup___c_m_s_i_s___core___sys_tick_functions_html_gaf8c314273a1e4970a5671bd7f8184f50"><div class="ttname"><a href="group___c_m_s_i_s___core___sys_tick_functions.html#gaf8c314273a1e4970a5671bd7f8184f50">CONTROL_Type::_reserved0</a></div><div class="ttdeci">uint32_t _reserved0</div><div class="ttdef"><b>Definition</b> core_cm0.h:290</div></div>
<div class="ttc" id="agroup___c_m_s_i_s__core___debug_functions_html_ga7b5ae9741a99808043394c4743b635c4"><div class="ttname"><a href="group___c_m_s_i_s__core___debug_functions.html#ga7b5ae9741a99808043394c4743b635c4">SCB_Type::SHCSR</a></div><div class="ttdeci">__IOM uint32_t SHCSR</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:507</div></div>
<div class="ttc" id="agroup___configuration__section__for___c_m_s_i_s_html_gae3fe3587d5100c787e02102ce3944460"><div class="ttname"><a href="group___configuration__section__for___c_m_s_i_s.html#gae3fe3587d5100c787e02102ce3944460">__NVIC_PRIO_BITS</a></div><div class="ttdeci">#define __NVIC_PRIO_BITS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:216</div></div>
<div class="ttc" id="agroup___peripheral__interrupt__number__definition_html_ga7e1129cd8a196f4284d41db3e82ad5c8"><div class="ttname"><a href="group___peripheral__interrupt__number__definition.html#ga7e1129cd8a196f4284d41db3e82ad5c8">IRQn_Type</a></div><div class="ttdeci">IRQn_Type</div><div class="ttdoc">STM32H7XX Interrupt Number Definition, according to the selected device in Library_configuration_sect...</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:49</div></div>
<div class="ttc" id="agroup___peripheral__interrupt__number__definition_html_gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7"><div class="ttname"><a href="group___peripheral__interrupt__number__definition.html#gga7e1129cd8a196f4284d41db3e82ad5c8a6dbff8f8543325f3474cbae2446776e7">SysTick_IRQn</a></div><div class="ttdeci">@ SysTick_IRQn</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:59</div></div>
<div class="ttc" id="astruct_n_v_i_c___type_html"><div class="ttname"><a href="struct_n_v_i_c___type.html">NVIC_Type</a></div><div class="ttdoc">Structure type to access the Nested Vectored Interrupt Controller (NVIC).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:463</div></div>
<div class="ttc" id="astruct_s_c_b___type_html"><div class="ttname"><a href="struct_s_c_b___type.html">SCB_Type</a></div><div class="ttdoc">Structure type to access the System Control Block (SCB).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:499</div></div>
<div class="ttc" id="astruct_sys_tick___type_html"><div class="ttname"><a href="struct_sys_tick___type.html">SysTick_Type</a></div><div class="ttdoc">Structure type to access the System Timer (SysTick).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:1036</div></div>
<div class="ttc" id="aunion_a_p_s_r___type_html"><div class="ttname"><a href="union_a_p_s_r___type.html">APSR_Type</a></div><div class="ttdoc">Union type to access the Application Program Status Register (APSR).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:316</div></div>
<div class="ttc" id="aunion_c_o_n_t_r_o_l___type_html"><div class="ttname"><a href="union_c_o_n_t_r_o_l___type.html">CONTROL_Type</a></div><div class="ttdoc">Union type to access the Control Registers (CONTROL).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:424</div></div>
<div class="ttc" id="aunion_i_p_s_r___type_html"><div class="ttname"><a href="union_i_p_s_r___type.html">IPSR_Type</a></div><div class="ttdoc">Union type to access the Interrupt Program Status Register (IPSR).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:355</div></div>
<div class="ttc" id="aunionx_p_s_r___type_html"><div class="ttname"><a href="unionx_p_s_r___type.html">xPSR_Type</a></div><div class="ttdoc">Union type to access the Special-Purpose Program Status Registers (xPSR).</div><div class="ttdef"><b>Definition</b> core_armv81mml.h:373</div></div>
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